ACLD-8125
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- Bus Interface: Standard AT‑Bus (ISA)
- Analog Inputs: 16 single‑ended or 8 differential channels
- Analog Outputs: Two 12‑bit monolithic multiplying D/A channels, double‑buffered
- Digital I/O: 16 digital inputs and 16 digital outputs, TTL/DTL compatible
- Resolution: 12‑bit A/D and 12‑bit D/A
- Sampling Rate: Up to 100 kS/s (single channel)
- Programmable Gain: ×0.5, ×1, ×2, ×4, ×8
- Input Range: Bipolar ±10 V to ±0.625 V; Unipolar 0–10 V to 0–1.25 V
- Trigger Modes: Software, internal pacer (timer), or external pulse trigger
- Data Transfer Modes: Polling, DMA, or interrupt‑driven
- Timer/Counter: Three programmable 16‑bit down counters (Intel 8254 compatible)
- Interrupts: 9 selectable IRQ levels (IRQ3, 5–7, 9–12, 15)
- DMA Channels: Selectable DMA 1 or DMA 3
- Power Supply: On‑board DC/DC converter for stable analog power
- Connectors: One 37‑pin D‑type female (analog I/O, timer), two 20‑pin headers (digital I/O)
- Compact Design: Half‑size PCB (162 mm × 115 mm)
- Software Support: C‑language library, LabVIEW driver, and Windows DLL development kit (ACLS‑DLL2)
- Analog Inputs: 16 single‑ended or 8 differential channels
- Analog Outputs: Two 12‑bit monolithic multiplying D/A channels, double‑buffered
- Digital I/O: 16 digital inputs and 16 digital outputs, TTL/DTL compatible
- Resolution: 12‑bit A/D and 12‑bit D/A
- Sampling Rate: Up to 100 kS/s (single channel)
- Programmable Gain: ×0.5, ×1, ×2, ×4, ×8
- Input Range: Bipolar ±10 V to ±0.625 V; Unipolar 0–10 V to 0–1.25 V
- Trigger Modes: Software, internal pacer (timer), or external pulse trigger
- Data Transfer Modes: Polling, DMA, or interrupt‑driven
- Timer/Counter: Three programmable 16‑bit down counters (Intel 8254 compatible)
- Interrupts: 9 selectable IRQ levels (IRQ3, 5–7, 9–12, 15)
- DMA Channels: Selectable DMA 1 or DMA 3
- Power Supply: On‑board DC/DC converter for stable analog power
- Connectors: One 37‑pin D‑type female (analog I/O, timer), two 20‑pin headers (digital I/O)
- Compact Design: Half‑size PCB (162 mm × 115 mm)
- Software Support: C‑language library, LabVIEW driver, and Windows DLL development kit (ACLS‑DLL2)
Comprehensive Product Summary: ADLINK ACL‑8112DG Data Acquisition Card
### 1. Product Overview
Product Name: ACL‑8112DG
Model: ACL‑8112DG
Series: ACL‑8112 Series – Enhanced Multi‑Function Data Acquisition Cards
Article Number: ACL‑8112DG
Manufacturer: ADLINK Technology Inc.
Trademark: NuDAQ®
Product Description:
The ADLINK ACL‑8112DG is a high‑performance, high‑speed, multi‑function data acquisition (DAQ) card designed for IBM PC/AT and compatible systems. It integrates analog‑to‑digital (A/D) conversion, digital‑to‑analog (D/A) conversion, digital input/output (DIO), and timer/counter functions on a single half‑size ISA card. The DG variant of the ACL‑8112 series emphasizes high‑speed sampling (up to 100 kS/s) with programmable gain and bipolar/unipolar input ranges, making it suitable for industrial, laboratory, and control applications requiring precise 12‑bit data acquisition.
### 2. Key Features
- Bus Interface: Standard AT‑Bus (ISA)
- Analog Inputs: 16 single‑ended or 8 differential channels
- Analog Outputs: Two 12‑bit monolithic multiplying D/A channels, double‑buffered
- Digital I/O: 16 digital inputs and 16 digital outputs, TTL/DTL compatible
- Resolution: 12‑bit A/D and 12‑bit D/A
- Sampling Rate: Up to 100 kS/s (single channel)
- Programmable Gain: ×0.5, ×1, ×2, ×4, ×8
- Input Range: Bipolar ±10 V to ±0.625 V; Unipolar 0–10 V to 0–1.25 V
- Trigger Modes: Software, internal pacer (timer), or external pulse trigger
- Data Transfer Modes: Polling, DMA, or interrupt‑driven
- Timer/Counter: Three programmable 16‑bit down counters (Intel 8254 compatible)
- Interrupts: 9 selectable IRQ levels (IRQ3, 5–7, 9–12, 15)
- DMA Channels: Selectable DMA 1 or DMA 3
- Power Supply: On‑board DC/DC converter for stable analog power
- Connectors: One 37‑pin D‑type female (analog I/O, timer), two 20‑pin headers (digital I/O)
- Compact Design: Half‑size PCB (162 mm × 115 mm)
- Software Support: C‑language library, LabVIEW driver, and Windows DLL development kit (ACLS‑DLL2)
### 3. Technical Specifications
Analog Input (A/D):
- Converter Type: ADS774 or equivalent, successive approximation
- Resolution: 12 bits
- Channels: 16 SE or 8 DIFF
- Input Range (programmable):
- Bipolar: ±10 V, ±5 V, ±2.5 V, ±1.25 V, ±0.625 V
- Unipolar: 0–10 V, 0–5 V, 0–2.5 V, 0–1.25 V
- Conversion Time: 8 µs
- Input Impedance: 10 MΩ
- Accuracy:
- Gain 0.5–1: ±0.01 % FSR ± 1 LSB
- Gain 2–4: ±0.02 % FSR ± 1 LSB
- Gain 8: ±0.04 % FSR ± 1 LSB
- Overvoltage Protection: ±35 V continuous
- Sampling Rate:
- 100 kHz max (single channel)
- 20 kHz max (multiplexed)
- Trigger Modes: Software, pacer, external
- Data Transfer: Polling, DMA, or interrupt
Analog Output (D/A):
- Converter: DAC7541 or equivalent
- Channels: 2 × 12‑bit, double‑buffered
- Output Range:
- Internal reference: 0–5 V or 0–10 V
- External reference: ±10 V max
- Settling Time: 30 µs
- Linearity: ±½ LSB
- Output Drive: ±5 mA max
Digital I/O:
- Channels: 16 inputs + 16 outputs (TTL compatible)
- Input Voltage: Low ≤ 0.8 V; High ≥ 2.0 V
- Output Voltage: Low ≤ 0.4 V; High ≥ 2.4 V
- Drive Capability: Sink 8 mA @ 0.5 V; Source 0.4 mA @ 2.7 V
Timer/Counter:
- Device: Intel 8254 compatible
- Counters: 3 × 16‑bit down counters
- A/D Pacer: 32‑bit (two cascaded 16‑bit counters) with 2 MHz time base
- Frequency Range: 0.00046 Hz – 100 kHz
- User Counter: 1 × 16‑bit, internal 2 MHz or external clock
General:
- I/O Base Address: 16 consecutive I/O locations (default 0x220)
- Interrupts: IRQ3, 5, 6, 7, 9, 10, 11, 12, 15
- DMA Channels: 1 or 3 (selectable)
- Operating Temperature: 0 °C – 55 °C
- Storage Temperature: –20 °C – 80 °C
- Humidity: 5 – 95 % (non‑condensing)
- Power Consumption: +5 V @ 430 mA typ., +12 V @ 150 mA typ.
- Dimensions: 162 mm (L) × 115 mm (W)
- PCB Type: Half‑size ISA card
### 4. Functionality
Operation Principle:
The ACL‑8112DG performs high‑speed analog‑to‑digital conversion using a 12‑bit successive‑approximation ADC. It supports both single‑ended and differential input configurations, selectable via jumper JP3. The card’s programmable gain amplifier allows scaling of input signals for optimal resolution. Data acquisition can be triggered by software, internal pacer timer, or external signal, and transferred to system memory via polling, interrupt, or DMA.
Use Cases & Applications:
- Industrial process monitoring and control
- Laboratory instrumentation and measurement
- Energy management and automation systems
- Product testing and quality assurance
- Event counting, pulse width, and frequency measurement
- Waveform generation and analog simulation
- Security and annunciation systems
Compatibility:
- IBM PC/AT and ISA‑bus compatible systems
- Supported software environments: MS‑DOS, Windows 3.1/95/98/NT
- Supported development tools: Borland C/C++, Visual C++, Visual Basic, Delphi, LabVIEW
### 5. Components & Accessories
Included Items:
- ACL‑8112DG Data Acquisition Card
- ADLINK CD with utilities, drivers, and C library
- User’s Manual
Connectors:
- CN1: 20‑pin Digital Output Header (DO 0–15)
- CN2: 20‑pin Digital Input Header (DI 0–15)
- CN3: 37‑pin D‑type female (Analog I/O and Timer/Counter)
Optional Daughter Boards:
- ACLD‑8125: Thermocouple input board with cold‑junction compensation
- ACLD‑9137: Direct connection terminal board
- ACLD‑9182: 16‑channel isolated digital input board (500 V isolation)
- ACLD‑9185: 16‑channel SPDT relay output board
- ACLD‑9188: General‑purpose terminal board for 37‑pin connections
### 6. Installation & Setup
System Requirements:
- IBM PC/AT or compatible ISA slot
- Available I/O address range (0x200–0x3FF)
- Available IRQ and DMA channels
Installation Steps:
1. Unpack the card on a grounded anti‑static mat.
2. Verify jumper and DIP switch settings before installation.
3. Insert the card into an available ISA slot.
4. Configure base address via SW1 (DIP switch, default 0x220).
5. Set DMA channel (JP7/JP8 = DMA 1 default).
6. Select trigger source (JP4 = internal default).
7. Configure IRQ level (JP5 = IRQ5 default).
8. Set D/A reference voltage (JP1 = –5 V default).
9. Connect external signals to CN1, CN2, and CN3 as required.
Analog Input Configuration:
- JP3 selects single‑ended or differential mode.
- For floating sources, use single‑ended mode.
- For grounded or differential sources, use differential mode to avoid ground loops.
Clock & Trigger Configuration:
- Internal 2 MHz oscillator (default) or external clock via CN3 pin 37.
- External trigger input via CN3 pin 17.
### 7. Performance & Capabilities
A/D Conversion:
- 12‑bit resolution, 8 µs conversion time
- 100 kS/s max sampling rate (single channel)
- Programmable gain for signal scaling
- Software, pacer, or external trigger modes
- Data transfer via polling, interrupt, or DMA
D/A Conversion:
- 12‑bit resolution, 30 µs settling time
- Output range 0–5 V or 0–10 V (unipolar)
- Double‑buffered registers for glitch‑free updates
Digital I/O:
- 16 inputs and 16 outputs for TTL/DTL logic
- Suitable for control signals, status monitoring, and relay driving
Timer/Counter:
- 8254 chip provides three 16‑bit counters
- Two counters cascaded for A/D pacer trigger (2 MHz base)
- One counter available for user applications (event counting, frequency measurement)
Limitations:
- ISA bus interface limits throughput compared to modern PCI/PCIe DAQ cards
- Single card supports two DMA channels maximum
- Multiplexed sampling limited to 20 kHz for multi‑channel operation
### 8. Standards & Compliance
- Bus Standard: ISA (AT‑Bus)
- Electrical Compatibility: TTL/DTL logic levels
- Environmental: Operating 0–55 °C, Storage –20–80 °C, 5–95 % RH non‑condensing
- Safety & Quality: Manufactured by ADLINK Technology Inc. under ISO‑compliant processes
- Software Interface: Compatible with LabVIEW and Windows DLL libraries
- Regulatory: Meets industrial EMC and safety requirements for ISA DAQ devices
### 9. Additional Information
Calibration:
- Six variable resistors (VR1–VR6) for A/D and D/A adjustment
- Bipolar and unipolar calibration procedures provided in manual
- Calibration utility included on software disk
Software Support:
- C Language Library: 23 API functions for A/D, D/A, DIO, and timer operations
- LabVIEW Driver: ACLS‑LVIEW for Windows 95/98/NT
- Windows DLL Kit: ACLS‑DLL2 for VC++, VB, Delphi (developer license required)
- Demo Programs: AD_DEMO1–4, DA_DEMO, DI_DEMO, DO_DEMO, TMR_DEMO
Warranty:
- Duration: 1 year from shipment date
- Coverage: Defects in materials and workmanship under normal operation
- Exclusions: Misuse, abuse, unauthorized repair, or modification
- Service: Return to ADLINK (postage prepaid) for repair or replacement
Technical Support:
- Website: [www.adlink.com.tw](http://www.adlink.com.tw)
- Email: service@adlink.com.tw | nudaq@adlink.com.tw
- Phone: +886‑2‑82265877 Fax: +886‑2‑82265717
- Address: 9F, No. 166, Jian Yi Road, Chungho City, Taipei 235, Taiwan R.O.C.
### Summary
The ADLINK ACL‑8112DG is a robust, cost‑effective, and versatile ISA‑bus data acquisition card integrating high‑speed 12‑bit A/D and D/A conversion, digital I/O, and timing functions. With a 100 kS/s sampling rate, programmable gain, and multiple trigger and transfer modes, it provides a flexible platform for industrial automation, laboratory measurement, and control applications. Its comprehensive software support—including C libraries, LabVIEW drivers, and Windows DLLs—ensures easy integration into custom data acquisition systems. The card’s stable DC/DC converter, wide input range options, and expandable I/O through optional daughter boards make it a reliable solution for precision signal measurement and control tasks.
### 1. Product Overview
Product Name: ACL‑8112DG
Model: ACL‑8112DG
Series: ACL‑8112 Series – Enhanced Multi‑Function Data Acquisition Cards
Article Number: ACL‑8112DG
Manufacturer: ADLINK Technology Inc.
Trademark: NuDAQ®
Product Description:
The ADLINK ACL‑8112DG is a high‑performance, high‑speed, multi‑function data acquisition (DAQ) card designed for IBM PC/AT and compatible systems. It integrates analog‑to‑digital (A/D) conversion, digital‑to‑analog (D/A) conversion, digital input/output (DIO), and timer/counter functions on a single half‑size ISA card. The DG variant of the ACL‑8112 series emphasizes high‑speed sampling (up to 100 kS/s) with programmable gain and bipolar/unipolar input ranges, making it suitable for industrial, laboratory, and control applications requiring precise 12‑bit data acquisition.
### 2. Key Features
- Bus Interface: Standard AT‑Bus (ISA)
- Analog Inputs: 16 single‑ended or 8 differential channels
- Analog Outputs: Two 12‑bit monolithic multiplying D/A channels, double‑buffered
- Digital I/O: 16 digital inputs and 16 digital outputs, TTL/DTL compatible
- Resolution: 12‑bit A/D and 12‑bit D/A
- Sampling Rate: Up to 100 kS/s (single channel)
- Programmable Gain: ×0.5, ×1, ×2, ×4, ×8
- Input Range: Bipolar ±10 V to ±0.625 V; Unipolar 0–10 V to 0–1.25 V
- Trigger Modes: Software, internal pacer (timer), or external pulse trigger
- Data Transfer Modes: Polling, DMA, or interrupt‑driven
- Timer/Counter: Three programmable 16‑bit down counters (Intel 8254 compatible)
- Interrupts: 9 selectable IRQ levels (IRQ3, 5–7, 9–12, 15)
- DMA Channels: Selectable DMA 1 or DMA 3
- Power Supply: On‑board DC/DC converter for stable analog power
- Connectors: One 37‑pin D‑type female (analog I/O, timer), two 20‑pin headers (digital I/O)
- Compact Design: Half‑size PCB (162 mm × 115 mm)
- Software Support: C‑language library, LabVIEW driver, and Windows DLL development kit (ACLS‑DLL2)
### 3. Technical Specifications
Analog Input (A/D):
- Converter Type: ADS774 or equivalent, successive approximation
- Resolution: 12 bits
- Channels: 16 SE or 8 DIFF
- Input Range (programmable):
- Bipolar: ±10 V, ±5 V, ±2.5 V, ±1.25 V, ±0.625 V
- Unipolar: 0–10 V, 0–5 V, 0–2.5 V, 0–1.25 V
- Conversion Time: 8 µs
- Input Impedance: 10 MΩ
- Accuracy:
- Gain 0.5–1: ±0.01 % FSR ± 1 LSB
- Gain 2–4: ±0.02 % FSR ± 1 LSB
- Gain 8: ±0.04 % FSR ± 1 LSB
- Overvoltage Protection: ±35 V continuous
- Sampling Rate:
- 100 kHz max (single channel)
- 20 kHz max (multiplexed)
- Trigger Modes: Software, pacer, external
- Data Transfer: Polling, DMA, or interrupt
Analog Output (D/A):
- Converter: DAC7541 or equivalent
- Channels: 2 × 12‑bit, double‑buffered
- Output Range:
- Internal reference: 0–5 V or 0–10 V
- External reference: ±10 V max
- Settling Time: 30 µs
- Linearity: ±½ LSB
- Output Drive: ±5 mA max
Digital I/O:
- Channels: 16 inputs + 16 outputs (TTL compatible)
- Input Voltage: Low ≤ 0.8 V; High ≥ 2.0 V
- Output Voltage: Low ≤ 0.4 V; High ≥ 2.4 V
- Drive Capability: Sink 8 mA @ 0.5 V; Source 0.4 mA @ 2.7 V
Timer/Counter:
- Device: Intel 8254 compatible
- Counters: 3 × 16‑bit down counters
- A/D Pacer: 32‑bit (two cascaded 16‑bit counters) with 2 MHz time base
- Frequency Range: 0.00046 Hz – 100 kHz
- User Counter: 1 × 16‑bit, internal 2 MHz or external clock
General:
- I/O Base Address: 16 consecutive I/O locations (default 0x220)
- Interrupts: IRQ3, 5, 6, 7, 9, 10, 11, 12, 15
- DMA Channels: 1 or 3 (selectable)
- Operating Temperature: 0 °C – 55 °C
- Storage Temperature: –20 °C – 80 °C
- Humidity: 5 – 95 % (non‑condensing)
- Power Consumption: +5 V @ 430 mA typ., +12 V @ 150 mA typ.
- Dimensions: 162 mm (L) × 115 mm (W)
- PCB Type: Half‑size ISA card
### 4. Functionality
Operation Principle:
The ACL‑8112DG performs high‑speed analog‑to‑digital conversion using a 12‑bit successive‑approximation ADC. It supports both single‑ended and differential input configurations, selectable via jumper JP3. The card’s programmable gain amplifier allows scaling of input signals for optimal resolution. Data acquisition can be triggered by software, internal pacer timer, or external signal, and transferred to system memory via polling, interrupt, or DMA.
Use Cases & Applications:
- Industrial process monitoring and control
- Laboratory instrumentation and measurement
- Energy management and automation systems
- Product testing and quality assurance
- Event counting, pulse width, and frequency measurement
- Waveform generation and analog simulation
- Security and annunciation systems
Compatibility:
- IBM PC/AT and ISA‑bus compatible systems
- Supported software environments: MS‑DOS, Windows 3.1/95/98/NT
- Supported development tools: Borland C/C++, Visual C++, Visual Basic, Delphi, LabVIEW
### 5. Components & Accessories
Included Items:
- ACL‑8112DG Data Acquisition Card
- ADLINK CD with utilities, drivers, and C library
- User’s Manual
Connectors:
- CN1: 20‑pin Digital Output Header (DO 0–15)
- CN2: 20‑pin Digital Input Header (DI 0–15)
- CN3: 37‑pin D‑type female (Analog I/O and Timer/Counter)
Optional Daughter Boards:
- ACLD‑8125: Thermocouple input board with cold‑junction compensation
- ACLD‑9137: Direct connection terminal board
- ACLD‑9182: 16‑channel isolated digital input board (500 V isolation)
- ACLD‑9185: 16‑channel SPDT relay output board
- ACLD‑9188: General‑purpose terminal board for 37‑pin connections
### 6. Installation & Setup
System Requirements:
- IBM PC/AT or compatible ISA slot
- Available I/O address range (0x200–0x3FF)
- Available IRQ and DMA channels
Installation Steps:
1. Unpack the card on a grounded anti‑static mat.
2. Verify jumper and DIP switch settings before installation.
3. Insert the card into an available ISA slot.
4. Configure base address via SW1 (DIP switch, default 0x220).
5. Set DMA channel (JP7/JP8 = DMA 1 default).
6. Select trigger source (JP4 = internal default).
7. Configure IRQ level (JP5 = IRQ5 default).
8. Set D/A reference voltage (JP1 = –5 V default).
9. Connect external signals to CN1, CN2, and CN3 as required.
Analog Input Configuration:
- JP3 selects single‑ended or differential mode.
- For floating sources, use single‑ended mode.
- For grounded or differential sources, use differential mode to avoid ground loops.
Clock & Trigger Configuration:
- Internal 2 MHz oscillator (default) or external clock via CN3 pin 37.
- External trigger input via CN3 pin 17.
### 7. Performance & Capabilities
A/D Conversion:
- 12‑bit resolution, 8 µs conversion time
- 100 kS/s max sampling rate (single channel)
- Programmable gain for signal scaling
- Software, pacer, or external trigger modes
- Data transfer via polling, interrupt, or DMA
D/A Conversion:
- 12‑bit resolution, 30 µs settling time
- Output range 0–5 V or 0–10 V (unipolar)
- Double‑buffered registers for glitch‑free updates
Digital I/O:
- 16 inputs and 16 outputs for TTL/DTL logic
- Suitable for control signals, status monitoring, and relay driving
Timer/Counter:
- 8254 chip provides three 16‑bit counters
- Two counters cascaded for A/D pacer trigger (2 MHz base)
- One counter available for user applications (event counting, frequency measurement)
Limitations:
- ISA bus interface limits throughput compared to modern PCI/PCIe DAQ cards
- Single card supports two DMA channels maximum
- Multiplexed sampling limited to 20 kHz for multi‑channel operation
### 8. Standards & Compliance
- Bus Standard: ISA (AT‑Bus)
- Electrical Compatibility: TTL/DTL logic levels
- Environmental: Operating 0–55 °C, Storage –20–80 °C, 5–95 % RH non‑condensing
- Safety & Quality: Manufactured by ADLINK Technology Inc. under ISO‑compliant processes
- Software Interface: Compatible with LabVIEW and Windows DLL libraries
- Regulatory: Meets industrial EMC and safety requirements for ISA DAQ devices
### 9. Additional Information
Calibration:
- Six variable resistors (VR1–VR6) for A/D and D/A adjustment
- Bipolar and unipolar calibration procedures provided in manual
- Calibration utility included on software disk
Software Support:
- C Language Library: 23 API functions for A/D, D/A, DIO, and timer operations
- LabVIEW Driver: ACLS‑LVIEW for Windows 95/98/NT
- Windows DLL Kit: ACLS‑DLL2 for VC++, VB, Delphi (developer license required)
- Demo Programs: AD_DEMO1–4, DA_DEMO, DI_DEMO, DO_DEMO, TMR_DEMO
Warranty:
- Duration: 1 year from shipment date
- Coverage: Defects in materials and workmanship under normal operation
- Exclusions: Misuse, abuse, unauthorized repair, or modification
- Service: Return to ADLINK (postage prepaid) for repair or replacement
Technical Support:
- Website: [www.adlink.com.tw](http://www.adlink.com.tw)
- Email: service@adlink.com.tw | nudaq@adlink.com.tw
- Phone: +886‑2‑82265877 Fax: +886‑2‑82265717
- Address: 9F, No. 166, Jian Yi Road, Chungho City, Taipei 235, Taiwan R.O.C.
### Summary
The ADLINK ACL‑8112DG is a robust, cost‑effective, and versatile ISA‑bus data acquisition card integrating high‑speed 12‑bit A/D and D/A conversion, digital I/O, and timing functions. With a 100 kS/s sampling rate, programmable gain, and multiple trigger and transfer modes, it provides a flexible platform for industrial automation, laboratory measurement, and control applications. Its comprehensive software support—including C libraries, LabVIEW drivers, and Windows DLLs—ensures easy integration into custom data acquisition systems. The card’s stable DC/DC converter, wide input range options, and expandable I/O through optional daughter boards make it a reliable solution for precision signal measurement and control tasks.
-
A8112 Series Manual.pdf
Manual
- ACLD-8125 - Panel with cold junction compensation
- ACLD-9138-01 - Panel general purpose, 2*20 small screw terminal
- ACLD-9137-01 - Direct 37 small screw terminal
- DIN-37D-01 - 37pin D-type panel DIN rail w/o cable
- ACLD-9182A-01 - isolated 16 DI (DC) panel
- ACLD-9185-01 - isolated 16 DO Relay panel
- ACLD-9188 - Panel for mounting low pass filter etc.
- DIN-20P-01 - 20pin header termination board DIN rail
- ACL-10337 - 2*20 pin to DB 37 slot adapter